Hi

For moderate division ratios ( like 100 MHz down to 1 MHz ), the 20 log N stuff holds

pretty well ….

Bob

> On Sep 17, 2018, at 12:37 AM, Dana Whitlow <***@gmail.com> wrote:

>

> The act of squaring up the waveform alone might not do much harm, depending

> on the extent

> to which the phase noise on said waveform has already been filtered off.

> But it's mainly when

> the signal gets divided down by large ratios that the difference would

> become really noticeable.

>

> For example, take the case of 10 MHz starting frequency; the phase noise

> several MHz out

> is likely to be nil. But divide the 10 MHz down to, say, 1 Hz; then

> there's likely to be quite a

> lot of phase noise within "folding range" of many Nyquist bands about 1 Hz.

>

> This, again, is why I wonder so much about our efforts in re-synthesizing

> higher frequencies from

> the 1PPS from GPS receivers. I don't know much the architecture of GPS

> receivers, but it seems

> to me it would sure be nice if there were some convenient way to extract a

> clean signal at the

> chipping rate, for use in generating standard reference frequencies.

>

> Dana

>

>

>

>

> On Sun, Sep 16, 2018 at 9:15 PM, Bob kb8tq <***@n1k.org> wrote:

>

>> Hi

>>

>> It’s pretty easy to demonstrate that squaring up a sine wave, even with

>> fairly simple

>> circuits does not create crazy phase noise issues. People have been doing

>> it successfully

>> for a lot of years. In general faster saturated logic produces lower noise

>> floors than slower

>> logic.

>>

>> Bob

>>

>>> On Sep 16, 2018, at 4:33 PM, Dana Whitlow <***@gmail.com> wrote:

>>>

>>> I'd been thinking, in an admittedly non-rigorous sort of way, about this

>>> matter for some years.

>>>

>>> As I see it, it is certainly true that the phase of an oscillator's

>> output

>>> is a continuous funciton

>>> of time. It could be described as a continuous ramp, whose slope

>>> corresponds to the frequency,

>>> and with a little bit of non-flat random noise superimposed on it.

>>>

>>> Now if you square up the waveform and do digital things with it (such as

>>> freq dividing, digital

>>> phase detection, etc), you are really only glimpsing the phase noise at

>>> transition times, and

>>> are blind in between. Thus the very process amounts to sampling the

>> phase

>>> noise waveform

>>> with a sampling phase detector. This view suggests that all the phase

>>> noise power is aliased

>>> and folded back into the band ranging from DC to Fsamp / 2, where Fsamp

>> is

>>> the frequency

>>> of the waveform after frequency division. This is why the time domain

>>> jitter of the oscillator's

>>> waveform is unchanged by "perfect" frequency division (or

>> multiplication).

>>>

>>> It is why I wonder about the wisdom of doing phase comparison at

>>> unnecessarily low frequency-

>>> all that noise would seem to be scrunched down into a bandwidth of half

>> the

>>> comparison frequency.

>>>

>>> Does this explanation help, and how does it sit with those of you who

>> have

>>> more expertise

>>> than I?

>>>

>>> Dana

>>>

>>>

>>>

>>>

>>> On Sun, Sep 16, 2018 at 4:06 PM, Attila Kinali <***@kinali.ch> wrote:

>>>

>>>> Moin,

>>>>

>>>> On Sat, 15 Sep 2018 08:38:55 -0700

>>>> "Richard (Rick) Karlquist" <***@karlquist.com> wrote:

>>>>

>>>>> On 9/15/2018 3:26 AM, Attila Kinali wrote:

>>>>>

>>>>>> possible logic family for the task. Otherwise the harmonics of the

>>>>>> switching of the FF will down-mix high frequency white noise down

>>>>>> to the signal band (this is the reason for the 10*log(N) noise scaling

>>>>>> of digital divider that Egan[1] and Calosso/Rubiola[2] and a few

>> others

>>>>>> mentioned).

>>>>>

>>>>> Wow, I never knew this in 45 years of designing synthesizers!

>>>>> I do remember that some of the frequency counter engineers at HP

>>>>> talked about noise aliasing. I think this is another way of

>>>>> describing the same problem.

>>>>

>>>> Yes. This effect has been known for a few decades at least.

>>>> What kind of puzzles me is, that I have not seen a mathematically

>>>> sound explanation of it, so far. People talk of aliasing and sampling,

>>>> but do not describe where the sampling happens in the first place.

>>>> After all, it's a time-continuous system and as such, there is no

>>>> sampling. One could look at it as a (sub-harmonic) mixing system,

>>>> but even that analogy falls short, as there is no second input.

>>>> It also fails at describing why there is not infinite energy being

>>>> down-mixed, as the resulting harmonic sum does not converge.

>>>>

>>>> If someone knows of a description that goes beyond handwavy arguments,

>>>> I would very much appreciate hearing of them.

>>>>

>>>> The only way to explain the effect in a rigorous way, that I could

>>>> figure out, is to apply Hajimiri and Lee's Impulse Sensitivity

>> Function[1],

>>>> and adapt from the oscillators they discribed to general periodic

>> systems.

>>>> (The step, as one can guess, is small, but hic sunt dracones)

>>>> Doing this, it becomes obvious that the down-mixing is an inherent

>>>> property of all systems that use or generate non-sinusoidal waveforms.

>>>> It is this ISF that is the source of the down-mixing/aliasing effect,

>>>> as it has a periodic waveform of sharp spikes.

>>>>

>>>> As the ISF is probably (this is my intuition and I have, unfortunately,

>>>> no proof of this) related to the derivative of the produced output

>>>> waveform,

>>>> it becomes important to limit the slew rate of the output, to introduce

>>>> a second pole in the ISF and thus limit the number of harmonics.

>>>> Yet, it is also important to keep the input slew rate high, in order to

>>>> keep the width/height of the ISF pulses low.

>>>>

>>>> A partial discussion of this can be found in the paper I presented

>>>> at IFCS earlier this year[2]. Unfortunately, the write-up is not

>>>> nice and I only realized after the deadline that I should have

>>>> all written it using a different approach. Sorry for that.

>>>> If something is not clear, do not hesitate to send me an email.

>>>>

>>>>> About 10 years ago, the frequency synthesizer chip vendors started

>>>>> talking about a Figure of Merit (FOM) that predicted phase noise floor,

>>>>> and it also included the 10 LOG N noise scaling. An application

>>>>> engineer at ADI told me this was a characteristic of the sampling phase

>>>>> detector that all these chips used. But I always wondered if the

>>>>> frequency divider could come into play. The way FOM is defined,

>>>>> it doesn't distinguish between phase detector and divider noise.

>>>>

>>>> The 10*log(N) also applies to the phase detector in PLL chips,

>>>> where N becomes the ratio of the phase detector bandwidth divided

>>>> by the phase detector input frequency.

>>>>

>>>> Given that the phase noise is dominated by the input source' phase

>>>> noise, there will be no appreciatable difference in whether the

>>>> down-mixing happens in the divider or the phase detector, as long

>>>> as the bandwidth of all components is the same. If the bandwidth

>>>> is different, we get into something akin Collins' zero crossing

>>>> detector[3] where appropriately designed stages with different

>>>> input bandwidths limit the energy that is down-mixed.

>>>>

>>>>> At Agilent, we used to make a lot of lab demos using a Centellax

>>>>> (now Microsemi AKA Microchip) frequency divider that could divide by

>> any

>>>>> number between 8 and 511 up to 10 GHz. It was absolutely fabulous for

>>>>> dividing 10 GHz down to 2.5 GHz. But 20 LOG N quit working if I tried

>>>>> to divide down to 50 MHz. Now you have explained it.

>>>>

>>>> Hmm? Are you implying those chips somehow were able to give

>>>> a 20*log(N) phase noise behaviour? If so, do you know how

>>>> they achieved such a feat?

>>>>

>>>>

>>>>>> If you divide by something that is not a power of 2, then it is

>>>> important

>>>>>> that each stage produces an output waveform with a 50% duty cycle.

>>>> Otherwise

>>>>>> flicker noise which has been up-mixed by a previous stage, will be

>>>> down-mixed

>>>>>> into the signal band, increasing the close-in phase-noise.

>>>>>

>>>>> Wow, another thing I never knew.

>>>>

>>>> I do not think that anyone was aware of this. A least I do not remember

>>>> seeing this being mentioned in any of the papers I have read. I, myself,

>>>> stumbled over it by accident. I was trying to design a sine-to-square

>>>> wave converter and wanted to understand what happend to the noise.

>>>> Especially the AM to PM conversion that a few people here have mentioned

>>>> a few times. I was looking at Claudio's measurement [4, page 28] and,

>>>> after applying Hajimir and Lee's ISF, I could (mathematically) explain

>>>> everything but what Enrico so nicely labled as "bump". None of the

>>>> explanations that I exchanged with Enrico, Claudio, Magnus and a few

>>>> other people made sense with the complete data. An external influence

>>>> didn't make sense as the flicker noise went from a straight ~6dB/oct

>> line

>>>> to a straight ~3db/oct line below 25MHz. This hunch got stronger when

>>>> Claudio shared the complete circuit they used with me(see figure 3 in

>> [2]).

>>>> The feedback circuit, which stabilizes duty cycle, has a -3dB frequency

>>>> of 0.28Hz, which is exactly the frequency where the bump is. And below

>>>> it, the flicker noise behavior seems to go back to approximately

>> 6dB/oct.

>>>> For a complete explanation, see my paper[2] section 5.D "Scaling in a

>>>> Multi-Stage Sine-to-Square Converter."

>>>>

>>>>

>>>>> The conventional wisdom was to

>>>>> divide by any number (even or odd) and then follow that divider

>>>>> with a divide by 2 flip flop to get 50%. Now, that is in question.

>>>>> The now correct answer is to us a variable modulus prescaler to

>>>>> divide by P and P+1, controlled by a toggle flip flop to make

>>>>> half the divisions at P and half at P+1.

>>>>

>>>> I don't think the modulus prescaler is a good approach.

>>>> It will help reduce flicker noise, at the price of incrased

>>>> white noise, as the two division values will generate two

>>>> frequency spikes in the ISF that are close to each other.

>>>> There is probably some residual even harmonic content due to

>>>> the switching betwen the two scaler values, which will increase

>>>> flicker noise, not as much as having non-50% duty cycle, but still.

>>>>

>>>> The right way to do it is to use both edges in case of odd division

>>>> factors (as some of the divider circuits by Linear/Analog seem to do).

>>>> Alternatively generate a ramp/sine output, ie use a Λ-divider

>>>> or a DDS, as both have much lower harmonics content in the ISF

>>>> and thus do not suffer from the down-mixing as much. If a square

>>>> waveform is required afterwards, a square-to-sine converter with

>>>> approriate bandwidth for the output frequency will solve that.

>>>>

>>>>

>>>>

>>>> Attila Kinali

>>>>

>>>>

>>>> [1] "A General Theory of Phase Noise in Electrical Oscillators,"

>>>> by Hajimir and Lee, 1998

>>>>

>>>> [2] "A Physical Sine-to-Square Converter Noise Model,"

>>>> by Kinali, 2018

>>>>

>>>> [3] "The Design of Low Jitter Hard Limiters," by Collins, 1996

>>>>

>>>> [4] http://rubiola.org/pdf-slides/2016T-EFTF--Noise-in-digital-

>>>> electronics.pdf

>>>> --

>>>> <JaberWorky> The bad part of Zurich is where the degenerates

>>>> throw DARK chocolate at you.

>>>>

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